1. Field of the Invention
The present application relates to a semiconductor structure and a manufacturing method thereof. More particularly, the present application relates to a photodiode array compatible with the CMOS manufacturing processes and the manufacturing method thereof.
2. Description of Related Art
Complementary metal oxide semiconductor (CMOS) image sensor (also called CIS) can be fabricated using the processes compatible with CMOS logic device manufacturing processes and can be easily integrated with peripheral circuits on the same chip, thus significantly reducing the costs and lowering the power of the image sensor. In recent years, CMOS image sensors become increasingly notable as CMOS image sensors have been widely applied for image display applications, including, but not limited to, alarm systems, surveillance systems, industrial monitoring and biochemical detection, etc. However, the conventional CMOS image sensors are limited by the use of color filter and unsuitable for high sensitivity applications.
U.S. Pat. No. 6,727,521 discloses a vertical color filter pixel sensor applicable for image sensors. As shown in its FIGS. 1 and 3, the multi junction structure demonstrates different quantum efficiency in the photodiodes disposed at different depth for blue, green and red light. However, the manufacturing processes of this structure are complicated and require two additional silicon epitaxy processes and a plurality of ion implantation processes. In FIG. 3, the first epitaxy process (66) is formed between the red and green diodes. The second epitaxy process (72) is formed between the blue and green diodes. As no isolation exists between the diodes, there is concern that the spatial resolution would be lowered. In addition, the two additional silicon epitaxy processes also increase the production costs.
In FIG. 2B of U.S. Pat. No. 7,470,946, the blue light detection region is denoted 202, the green light detection region is denoted 204 and the red light detection region is denoted 206. However, the silicon on insulator (SOI) technology, which is still in its infant stage, is employed, leading to low yield.
U.S. Pat. No. 6,841,816 describes a method of forming a vertical color filter sensor on the silicon substrate. In its FIG. 12, a cross-sectional view of a single sensor is illustrated. Silicon dioxide is used between the sensors to prevent the carrier diffusion from the adjacent sensors, so as to avoid cross-talk. In addition, the arsenic ion is implanted with a voltage of 1200 keV to form the junction in a depth of 1 μm, which is not commonly used condition for the conventional semiconductor processes. The formation of the extra silicon dioxide insulating layers further complicates the manufacturing processes. The interface of the epitaxy layer is located between the multi junction diodes, which leads to the increase of dark currents and the reduction of the quantum efficiency.
U.S. Pat. No. 7,651,883 discloses using the U-shaped well regions surrounding each multi junction photodiode to avoid the reduction of the spatial resolution by preventing the carriers diffusing into the adjacent photodiodes. The photodiodes are fabricated directly on the n type silicon substrate without the needs of the epitaxy layer. Although the U-shaped well regions solves the spatial resolution problem owing to the lack of outer isolation as described in U.S. Pat. No. 6,960,757, the formation of the U-shaped well surrounding the multi junction structure in this article employs high-energy ion implantation processes. Furthermore, the n type substrate used in this article is not compatible with the CMOS logic processes used in the semiconductor industry, thus not suitable for mass production in foundries. In addition, emphasized in this patent that the multi junction structure is formed directly on the substrate without the need of epitaxy layers on the substrate, the leakage current could be larger due to defects in the substrate and awkward substrate planarity.